This invention relates to apparatus for dividing the input/output line of a dynamic RAM by means of a decoding arrangement.
Presently, an input/output line is connected through a switching transistor to a sense amplifier for an input/output of a signal. With the increase of the degree of circuit integration, the length of the I/O line becomes longer and the number of gated switching transistors becomes larger. Consequently, increased parasitic capacitances, due to the increment of circuit density, increases the signal propagation delay time.
Therefore, it is required that the loading of the I/O line be decreased to reduce the propagation delay time between a sense amplifier and the I/O line in accordance with the increase of the degree of circuit integration.